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Stratix V FPGA card UDP and TCP offload

$750-1500 USD

Cancelled
Posted about 4 years ago

$750-1500 USD

Paid on delivery
I have Stratix V fpga card. I need a solution to get a UDP and TCP data to host application
Project ID: 23922531

About the project

5 proposals
Remote project
Active 4 yrs ago

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5 freelancers are bidding on average $4,425 USD for this job
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Hi I have been working on verilog/VHDL and Xilinx and Altera FPGAs and Tools by more than 7 years. I have already worked on TCP/IP and UDP protocols to send data to remote host from FPGA. to PC and vica versa. I can work on your project. The price is negotiable depending on your exact requirements. Thanks
$1,200 USD in 20 days
4.8 (33 reviews)
5.9
5.9
User Avatar
hello, just completed the verilog/vhdl and c++ related task have a look to my reviews and i am really very interested in you project
$800 USD in 4 days
5.0 (9 reviews)
4.9
4.9
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We are a team of Electrical and Electronics engineers and we are Excellent in the following areas: • Embedded C Programming. • VHDL/Verilog • Microcontroller like Arduino, Raspberry Pi, FPGA, AVR, PIC and STM32. • IDEs like Keil MDK V5, ATmel studio and MPLab XC8. • PLCs / SCADA • PCB Designing-Proteus, Eagle. • Multisim • IOT Technologies like Ethernet, GSM GPRS. • HTTP Restful APIs connection for IOT Communications. Also we have good command over report writing, I can show you many samples of our previous reports. Kindly consider us for your project and text me so that we can further discuss specifically about your project's main goals and requirements. We can deliver your project efficiently at a time. If you choose me, I think you won't regret. Best Regards. Also we have good command over REPORT WRITING, We can show you many samples of our previous reports. We can discuss further details in the message box.
$1,125 USD in 7 days
4.7 (22 reviews)
5.1
5.1
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Hello, I am an FPGA engineer with more than 5 years of experience in working on FPGA systems development. I have worked on Altera, Xilinx high-end devices, especially Altera Statrix V systems. Also, I have been working on Ethernet for quite some time, especially, developing Ethernet Phy on FPGA. I have a IEEE research publication on Ethernet as well. As your requirement, I believe, we can use Altera Ethernet Core for sending and receiving TCP/IP, UDP data packets. But We have to decide that, based on excat reqirements of the project. I am looking forward to hearing back from you. Thank you Anusha
$1,000 USD in 20 days
4.6 (7 reviews)
3.9
3.9
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Судя по всему, вам необходимо сделать транкинг на два порта по 10Г. Задача интересная, но на 20Г суммарной пропускной способности - не сильно простая, особенно если добавить VLANы и мультикасты по UDP.
$18,000 USD in 30 days
5.0 (1 review)
1.9
1.9

About the client

Flag of RUSSIAN FEDERATION
St Petersburg, Russian Federation
0.0
0
Member since Feb 15, 2020

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