This project require you to design a logic circuit using state machine of ( nim game misere strategy) and implement it using VHDL. The code should be written to run on altera E2_115 board.
All detail is elaborated in the attached word document.
you should do the following:
1. you must include the de-bouncer VHDL file in your code as a component and use it as it is, no change is allowed inside it. (this file attached).
2. Algorithmic State Machine of the system that you used in your code and the Block diagram of The design .
3. Fully documented VHDL source code
4. Pin assignment file
good luck
Hi,
-FPGA design engineer since last 7 years
-Expertise in verilog/VHDL
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Hello,
Thanks for your invitation. My name is Mohamed. I have 5 years experience in VHDL and Verilog. I checked your project description and I can handle it. Contact me.
Regards
Hello
this is complicated task requring lot of work. I can d this in high quaility with your help (board acess). Some FSM will be necessary and some AI as well.
Ondrej
Hi
my name is Khaled i'm Electronics and communication engineer specially digital design engineer
i worked before on designing digital electronics circuits and i have experience on it
i worked before on designing GPU and CPU in VHDL codes as a part of my studies ,i read the file you attached and play the game on site , it's very nice game :D
it motivates me to do this task
