design and implemenatation of fft processor using vedic multiplier

Closed Posted Feb 8, 2015 Paid on delivery
Closed Paid on delivery

in this project we have to design fir filter and fft processor by using vedic mathematics

Verilog / VHDL

Project ID: #7107380

About the project

11 proposals Remote project Active Mar 17, 2015

11 freelancers are bidding on average ₹17947 for this job

loi09dt1

I have had more than 3 years experiences on FPGA Design using Verilog and VHDL: - FPGA's Xilinx and Altera. - MicroBlaze, Embedded system design on FPGA of Xilinx. - FPGA, VLSI Implementation of DSP System( Matlab o More

₹27777 INR in 3 days
(26 Reviews)
5.2
zarnescugeorge

Hello! I can help you right away! I have 10 years experience as a digital design engineer and vhdl/fpga implementer! Please send me a message to talk more about your project! Have a nice day!

₹22222 INR in 0 days
(18 Reviews)
4.3
shobhitkapoor

Hi I have 10+ years of experience with VHDL/Verilog . previously I have designed vedic multiplier for my of client on freelancer , he gave me 5 star rating. I have also experience in FFT , I think I am suitab More

₹16666 INR in 10 days
(10 Reviews)
4.2
ee4raja

Hi We are experts in semiconductor domain. We understand your requirement and we have papers related the same topic. Looking forward to discuss with you and start the project immediately. -- Thanks and Regards Raj More

₹13889 INR in 30 days
(5 Reviews)
3.7
SANGITAR

Are you referring any IEEE paper for the same,pls share more information regarding your project,do you want simulation or synthesis or both

₹26315 INR in 10 days
(2 Reviews)
2.4
razorgeneral

Hi, My Background: Manager, Designs. VHDL/Verilog/Algorithms expert. I've implemented the normal FFT (1024 point) in an FPGA for WiMAX 802.16D Communication system. Please send me details about your implementation More

₹13888 INR in 10 days
(1 Review)
1.4
maddinabalaji

Experience on FIR Filters, FFT processor design and implementation,. Worked on FIR filter as LPF, HPF, BPF.

₹16666 INR in 15 days
(0 Reviews)
0.0
Anishkumaran

Hai, This is Anishkumar from your own contry. I am having total of 5 year experience in VHDL programming. I am also guided the students those done the projects in Vedic mathematics. So i will finish your project withi More

₹13888 INR in 7 days
(0 Reviews)
0.0
adrises

I am currently working on implementation of wavelet transform on FPGA. It required faster computation using vedic mathematics. Implimentation of FIR for FFT will be similar. I can deliver you the code within 7 days.

₹15555 INR in 10 days
(0 Reviews)
0.0
prasharma123

* Hand-on experience on Verilog through academic and industrial projects. * Good Understanding and Background in DSP and Signal Processing. * Currently working on low power microprocessor design with a module of vedi More

₹16666 INR in 10 days
(0 Reviews)
0.0