Hi, I am an experienced VHDL and Verilog HDL RTL engineer with more than 15 years of experience. I can answer all of these questions and produce a high-quality writeup. Do you have the design of the educational processor (written by you or the professor?) Or is it also needed to be designed? In this case I would have to know every established reference for designing it by the professor in order to implement its ISA and microarchitecture. Overall, a doable assignment of 2-3 days of work.