ADC and ethernet on Xilinx Spartan 3 board
$30-250 USD
Paid on delivery
I need a program to continuously capture the data from the ADC on the Spartan 3A or Spartan 3E board and stream it out over the ethernet on the board.
The 2 ADCs on the boards are 12/14 bits with a maximum sampling frequency of [url removed, login to view] so the ethernet communication must be configured for 100Mbs rather than 10Mbps.
For reference you can use:
[url removed, login to view]
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[url removed, login to view],plasma
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[url removed, login to view]
ONLY in VHDL, no Verilog, please do not ask.
No upfront payment, payment guranteed with e-screw after receiving working simulation and code.
PLEASE : if you ask for pre-pay, I decline your bid right away.
Just to clarify, the design must be able to communication via TCPIP and not just a point to point ethernet connection with your own protocol. Project Plasma or EDK can be good starting points for it but not necessary.
Project ID: #903368