Vlsi verilog fpga asic jobs

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    3,459 vlsi verilog fpga asic jobs found, pricing in USD

    I have a DE1-SoC FPGA board. I need an image build with a Linux installation (doesn't really matter) and the linux-socfpga kernel; however, the device tree blob on the installation must recognize the onboard FPGA peripherals, especially the onboard ADC. The goal is to have a working Linux image file, which when burned to an SD card would load Linux

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    Read data sensor 5 days left
    VERIFIED

    Read data of sensor on FPGA Xillinx. More details via messenger Freelancer.com with full requirements.

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    Trophy icon Logo creation 1 day left

    I need a VERY nice logo in PNG and also JPG and TIFF Logo is about crypto mining using...FPGAs boards. To get a better idea you can search on google for "crypto mining" and for "vcu1525" "bcu1525" The logo text will be The MAIN TEXT is: FPGA BLOG dot TECH The secondary text it: The FPGA crypto mining reference website Do NOT use any BITCOIN logo

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    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Modelsim] Candidate

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    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Modelsim] Candidate

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    The aim of the project is to design a BIST controller to insert and detect the faults (defect) like ...Read disturbance, Erase disturbance, Program disturbance, SAF, TF, ADF, CFs, TF, NPSF, Retention fault in FLASH memory by using BIST algorithm like March algorithm using verilog or VHDL in Xilinx or Modelsim. Need Simulation waveforms for the same.

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    Needs to hire 2 Freelancers We are looking for designer to design Video object tracking : 1- CPU, CUDA based or FPGA accelerated algorithm . 2- Multi-target Detection/ tracking . 3- Moving object detection . 4- High accuracy , auto scaling , occlusion recovering . 5- fixed camera or moving camera. 6- Image Stabilization . 7- Move on Move tracking

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    Hi! I need some help with DSP48E1 verilog instantiation.

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    We are looking for someone with engineering background, preferably knowledge in FPGA related stuff to translate some tehnical documents. Google translate is not acceptable.

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    Looking for a mentor in advanced FPGA development using Altera Max 10 FPGA board specifically.

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    1. Identify a good value and properly sized CPLD/FPGA and toolset (toolset needs to be relatively easy to configure) to accommodate the required functionality. 2. Develop the CPLD/FPGA code. The device needs to take as inputs a set of states (from a microcontroller so either as an I2C command or as a 3 digital input code, along with 3 digital inputs

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    I need a network of thermostats that send data over Power Line Communication to a router where it is then sent over Ethernet and stored on a server. I will need to have software to access and display the data in graph form. There are other components that I need that are not so detailed. I need consulting for the design and components to use for both the thermostats and the modem/router as well a...

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    I need some help with selling my services. I am verilog/ matlab coder and I need customers . you find me a client , I write his/her code and you get paid %30 of the project budget

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    ...square or rectangular with maximum dimensions of 9.5 cm x 9.5 cm. The PCB should hold 5 of the following boards: [login to view URL] There should be some minimal interconnection between the 5 boards (more details to be provided). The USB ports on each of the boards will be used only for programming

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    I am looking for Xilinx SDx OpenCL expert, who can convert github miner project into FPGA hex file in Xilinx SDx. Don't bid if you do not have experience.

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    Reading of sensor via PMOD on FPGA Xillinx. More details via messenger Freelancer.com with full requirements.

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    I need to implement the project using fully parallel interleaver and QPP interleaver in FPGA platform. the language used for coding is Verilog and it is synthesized in Xilinx.

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    ...for 1 hour work max! We have the attached 128*128 image, i just need some fixes and to run it and produce the new image after the median filter we pass it through microblaze FPGA in the c program. I specifucally want: 1. instead of arrays i want the resulting image to come off like a txt if possible 2. i want inside the code to include the part we

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    Hello everybody, I want a simple median filter in c embedded through a micriblaze fFPGA. I have some part of the code ready. i need it in 1 hour. If you got it lets talk :)

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    Hello dear, I have this image table i produced through c embedded median filter code. i want this table to be passed through an FPGA microblaze and then deliver the new image. Thats all. interested? it is for today

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    Hello dear, I have this image table i produced through c embedded median filter code. i want this table to be passed through an FPGA microblaze and then deliver the new image. Thats all. interested? it is for today

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    Hello Dear, I have an urgent quick project. I have a...quick project. I have an embedded median filter of a table image 128*128 in c. I have the c code ready already. I just need you to take the median image 8*8 a nd pass it through FPGA with and without cache memory and then deliver the new images we get. It is for today please reply if interested

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    Hello Freelancers, I would like to pass my table image through a FPGA microblaze (both with cache and without cache) and have a s deliverables the 2 new images we get as results. This is for TODAY. Thank you in advance :)

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    ...guys I will need these simple tasks for $10USD the deadline is today 8 September. Description In C language, i will need embedded a median filter that I need to pass after a FPGA microblaze with image data (128x128) (with and without cache memory). I would like comments on the code and the new resulting image as deliverables. I attach the image table

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    ...for $10 - $15 USD the first until today 8 September the second until tommorow 9 September. 1) in C language, i will need embedded a median filter that I need to pass after a FPGA microblaze with image data (128x128) (with and without cache memory). I would comments on the code and the resulting image as deliverables. 2) I need just a divider in vhdl

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    I require ongoing assistance completing data input for client files into particular forms that need to be lodged with ASIC (industry regulator). The successful applicant will need to be able to read and interpret financial information such as Balance Sheets & Personal Property Security Register (PPSR) searches. I will provide the searches and financial

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    ...- Electric Shock: An electric impulsion that hit a single ennemy - Hacker: A guy with black glasses and a gun - Bugs: 3 small landing creatures that launch strange things - ASIC: A big human like machine with fans - Mouses: 5 little computer mouses - Scammer: A bad look guy that hit with a computer The game will be played in a website that is currently

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    RISC-V CPU chip high performance low power -- run EDA tools to generate GDSII synthesis and place and route

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    Hello guys I will need these simple tasks for $10 - $15 USD until 6 or 7 of September. 1) in C language, i will need embedded a median filter that I need to pass after a FPGA microblaze with image data (128x128) (with and without cache memory) 2) I need just a divider in vhdl language to pass through and confirm with numbers that it works I attach

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    ...so i am looking for Electrical & Electronics engineer Mechanical Engineer Civil Engineer Engineers should be expert in following fields Arduino Matlab Raspberry Pi FPGA Verilog/VHDL Python PCB Design (Eagle/Altium) Solidworks AutoCAD if you are expert in any of above mentioned fields then you can place a bid. We will prefer fresh Freelancers

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    ...relates to vs1005 (All in one audio player on a chip) [login to view URL] by [login to view URL] in combination with the developer board. Programs are written using VLSI Solution's Integrated Development Environment VSIDE [login to view URL] We are coding a VS1005 and want to use a stepper motor as an encoder with

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    ... I am working on a easy Vhdl project, i already wrote all the code, the simolulation is working, but i need your help for two fast tasks: • I need to assign the pins on my FPGA, i can't find the correct pin of 2 serial signals. • i need you to check if the clock frequency is correct. Can you please help me , i need go deliver the project asap :).

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    verilog coding using putty or terminal. if you are interested i will give more information.

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    I want help with system Verilog coding. I have a working code that I want revised a bit.

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    An existing algorithm is available, apply it and get the results. Then make minor changes in it for improvement and get the results

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    mtech Verilog project

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    looking for someone who can convert Open CL algorithm into FPGA Verilog project

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    Only experienced developer in FPGA mining and OpenCL GPU mining. I am looking for a freelancer who can convert Open CL algorithm into FPGA Verilog project.

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    ...site. x.25. Electronics Radio Circuits designing and Radio Frequency transmitters and receiver data communication experience required, preferably in Meteor burst technology. FPGA, Microcontroller interfacing, Motorola VHF transceiver experience preferred. The main Aim is Data communication through wireless communication link x.25. VHF Meteor burst transmitter

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    ...Development, Course Designing, Training, and placement guidance, based at South India. SD Pro providers Training and Projects in Embedded systems, VLSI, Matlab, Power systems, Power Electronics, DSP/DIP, VLSI, .Net, Java/J2EE /Android, Mechanical Design and Fabrication as well as develops its own range of quality Embedded products. SD Pro has successfully

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    ...Testing Video Production Landscape Design Online Writing Financial Analysis Drafting Package Design User Experience Design Moving Swift Autodesk Inventor Tattoo Design Call Center FPGA Handyman Microsoft SQL Server Digital Marketing Wikipedia Zbrush Carpentry Book Artist Procurement Database Development Raspberry Pi Wix VB.NET Sketching Email Developer

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    ...task estimations and time tracking. • Understanding digital electronics and ability to read schematics, analog electronics is a big plus but not obligatory • Experience with FPGA is an asset • Understanding blue prints, engineering drawings and familiarity with PCBs • Experience with measurement instruments (multimeter, oscilloscope). Basic soldering

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    I am looking for someone to programme Asics for algorithms

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    my company is going to build a website for the asic verification. we need a technical content writer who knows the Verilog, system Verilog,uvm and ovm industry subjects.

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    Hello, we are looking for an experienced Lin...create a Minable and Stakable coin for us. Project will require you to create the coin, Windows wallet, mobile wallet, nodes setup and build a mining pool. We are hoping to use ASIC resistant algorithms such as Yescryptr16 or Cryptonight Heavy or other. Links to examples of your work would be appreciated.

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    Hi We need to make ethminer linux application work with Antminer S9 ASIC miner. Antminer S9 does only support SHA-256 and not ETHHASH. Alternatively write custom firmware that allows ETH mining. Please mention what solution you propose. Regards For questions: [Removed by Freelancer.com Admin]

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    implement Hough transform algorithm with FPGA with verilog in ISE input = 8*8 binary image

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    ...consulting and code-writing for my FPGA board: [login to view URL] I have 6 PDM mics I got from Adafruit: [login to view URL] I want to do synchronized-recording of the audio from the mics into FPGA-board, and stream this recording to

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    Hello, i need help with an assignment for verilog. Specifically I need to continue with an RISC-V ALU that I am required to make. Then after I am done with the executions, I need to make a Fetch, Decode and Writeback code. We can talk so I can explain more of the files given to us and for any questions. Some is the work that I have done so far. I am

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    program with fpga to control TCP data and flow.

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