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    285 vlsi freelance jobs found, pricing in USD

    VLSI developer expertise enhanced in optimization concepts are required

    $517 (Avg Bid)
    $517 Avg Bid
    8 bids

    Firstly I would need a project suggestion for a masters project in VLSI testing and verification using Synopsis EDA tools for sequential circuits, because I have to submit a project proposal. Once a project suggestion seems acceptable, I will need help in finishing the project with desired outputs and compare the same with FPGA implementation. By bid

    $561 (Avg Bid)
    $561 Avg Bid
    11 bids

    I need some one has background about VLSI

    $83 (Avg Bid)
    $83 Avg Bid
    9 bids

    I need help in my company project (more details will be share with shortlisted candidate) You have to be very good in MIPS assembly language RTL, verilog, and basics VLSI technology to be shortlist you have to solve one MIPS Asm. question (attached below) as soon as possible.

    $994 (Avg Bid)
    $994 Avg Bid
    5 bids

    I am going to do my research so I need useful research ideas in electronics, electrical, IT domains and those who have research ideas in VLSI , Embedded systems, Finfet technology, Drones bid me.

    $67 (Avg Bid)
    $67 Avg Bid
    16 bids

    Multiplier cell design with the application of 8X8 multiplier, related to VLSI design (very large scale integration). required : some report corrections in chapter 1 and 2 regarding the references and report writing. I have a attached a copy of the report and a paper specifying the corrections.

    $21 (Avg Bid)
    $21 Avg Bid
    6 bids

    Looking for project topics in VLSI testing and verification using Synopsis EDA tools and TETRAMAX for sequential circuits. Once a topic has been selected, I would need help in finishing the project with desired outputs. Finally, I would also need an explanation of the functioning after completing the project.

    $435 (Avg Bid)
    $435 Avg Bid
    10 bids

    Multiplier cell design with the application of 8X8 multiplier, related to VLSI design (very large scale integration). required : some report corrections in chapter 1 and 2 regarding the references and report writing. I have a attached a copy of the report and a paper specifying the corrections.

    $23 (Avg Bid)
    $23 Avg Bid
    4 bids

    I need you to develop some software for me. I would like this software to be developed for Windows using Python. floor planning of vlsi module , I have to optimise it using Patrical swarm algorithm , need gui for it It requires 1. formation of model ,i.e placement of [url removed, login to view] with a big block 2. if there are 4 block within a big block then there

    $185 (Avg Bid)
    $185 Avg Bid
    4 bids

    An efficient Glitch power reduction using sequential clock gating in VLSI circuits

    $162 (Avg Bid)
    $162 Avg Bid
    8 bids

    c Integrated Circuit (ASIC) implementation of an N x N array multiplier. The ASIC will be fabricated in AMI 0.5 m CMOS technology available through MOSIS.

    $168 (Avg Bid)
    $168 Avg Bid
    3 bids

    c Integrated Circuit (ASIC) implementation of an N x N array multiplier. The ASIC will be fabricated in AMI 0.5 m CMOS technology available through MOSIS.

    $30 - $250
    $30 - $250
    0 bids

    c Integrated Circuit (ASIC) implementation of an N x N array multiplier. The ASIC will be fabricated in AMI 0.5 m CMOS technology available through MOSIS.

    $555 (Avg Bid)
    $555 Avg Bid
    5 bids
    VLSI technologia Ended
    VERIFIED

    I need you to write a research article . About VLSI technologia

    $41 (Avg Bid)
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    11 bids

    c Integrated Circuit (ASIC) implementation of an N x N array multiplier. The ASIC will be fabricated in AMI 0.5 m CMOS technology available through MOSIS.

    $183 (Avg Bid)
    $183 Avg Bid
    7 bids

    c Integrated Circuit (ASIC) implementation of an N x N array multiplier. The ASIC will be fabricated in AMI 0.5 m CMOS technology available through MOSIS.

    $133 (Avg Bid)
    $133 Avg Bid
    2 bids

    NxN array multiplier to be designed using cadence

    $30 - $250
    $30 - $250
    0 bids

    A structural methodolgy for scan based design cells with efficient power dissipation methods

    $155 (Avg Bid)
    $155 Avg Bid
    1 bids

    the tool required to be used is l-edit software

    $237 (Avg Bid)
    $237 Avg Bid
    5 bids

    ...Analysis and comparative study of the electrical characteristics of DMDG MOSFETs with that of conventional SOI MOSFETs has been done. DMDG MOSFETs has become a important part of VLSI research. An analytical model is developed using ATLAS simulator to analyze short channel effects (SCE),threshold voltage, potential [url removed, login to view] structure was designed

    $9 - $23
    $9 - $23
    0 bids