We have an almost complete aut...cRIO We need someone to make minor modifications and possibly offer ongoing support in the future. You should be familiar with LabVIEW coding for cRIO including the internal FPGA We are based just south of Milton Keynes, if this is of interest please call [Removed by Freelancer.com Admin] to discuss further details
We need to connect Sony imaging sensors (not industrial ones) to Raspberry PI, using Lattice FPGA. We are looking for expert designers, with their own design tools. We only need the design of the electronics, so no physical tests, and no components available. The design will be checked for compliance before final payment. Possible further cooperation
I am looking for people who join my team, we are working with new FPGA miner which are highly efficient that everybody can profit. basically it is a binary salery plan with a crypto mining product. So you have the chance to start your own business in the field or you work for me as a freelancer and get for every customer that signs up a reward of 25
I have Altera Verilog source code. This is crosspoing from Altera. Add a special feature (essential) to enable any one input (DI) to connect simultaneously to ALLoutputs (DO). Likely part would be EPM570T100I5. You can get source code follow link. [login to view URL]
Following the sa...my categories to put inside my navigation menu on my ecommerce. The categories topics are: 1: Microcontrolers, Modules 2: Arduino, Raspberry pi, Tensilica, STM32, ATTINY, FPGA 3: Breadboard, Power Source, Network, Sensors, Modules, Relay (actuators), LED, CNC, Motor, USB, Memory, Infra-RED, Radio Frequency, Temperature, ASIC Chips
I am a cryptocurrency miner, and I would like to buy a larger number of FPGA cards to mine with, specifically the Xilinx VCU1525 FPGA Card. I need someone to Program the card to mine a number of specific algorithms. Preferably the dagger hashimoto, Neoscrypt, Equihash algorithms, I need a quote on how much this will cost.
We are seeking a consultant to migrate several Xilinx K7, K7 Ultra and/or V7 FPGA-based DSP Apps (developed using Vivado) to OpenCL so they can run on Intel, AMD/ATI, NVIDIA and mobile GPUs. Ideally, the OpenCL acceleration would fit into our existing Windows / LabVIEW framework so we could have compatibility with our current set of apps.
we sell our customers some IP (named CoaXPress FPGA IP). the price is one time however there is first year of maintenance and warranty provided free of cost with purchasing. Following years of maintenance are optional (not mandatory). However, if its not purchased, then customers will net get updates or support of their product. In case of requirement
I have a very simple FPGA project to test the Intel Arria 10 SoC Dev kit (DK-SOC-10AS066S-A) with Quartus Prime Pro 18.0 as follows. The main code instantiates an IOPLL Intel FPGA IP core to reduce the input board clock from 100 MHz down to 2 MHz which drives a Unique Chip ID core. It also blinks an LED on the board. You can download the project here:
i want to realize the transfer function on fpga so any one with knowledge of vhdl and quartus tool can bid Thank you