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    5,267 outsource asic vlsi fpga verilog vhdl jobs found, pricing in USD

    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Modelsim] Candidate

    $212 (Avg Bid)
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    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Modelsim] Candidate

    $154 (Avg Bid)
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    The aim of the project is to design a BIST controller to insert and detect the faults (defect) like ...Read disturbance, Erase disturbance, Program disturbance, SAF, TF, ADF, CFs, TF, NPSF, Retention fault in FLASH memory by using BIST algorithm like March algorithm using verilog or VHDL in Xilinx or Modelsim. Need Simulation waveforms for the same.

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    Vhdl LCD finctional 6 days left
    VERIFIED

    In ready projekt on vhdl (tic tac toe game) I need to add state od the gamÄ™ on LCD [login to view URL]

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    Needs to hire 2 Freelancers We are looking for designer to design Video object tracking : 1- CPU, CUDA based or FPGA accelerated algorithm . 2- Multi-target Detection/ tracking . 3- Moving object detection . 4- High accuracy , auto scaling , occlusion recovering . 5- fixed camera or moving camera. 6- Image Stabilization . 7- Move on Move tracking

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    Busco crear un logotipo para mi empresa de colocación digital y de outsourcing.

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    DSP48E1 help 3 days left

    Hi! I need some help with DSP48E1 verilog instantiation.

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    We are looking for someone with engineering background, preferably knowledge in FPGA related stuff to translate some tehnical documents. Google translate is not acceptable.

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    I need some help with finding some leads.

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    I need to write a VHDL code for transfer data from 2 zedboard using ethernet without using a zynq-processor

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    Looking for a mentor in advanced FPGA development using Altera Max 10 FPGA board specifically.

    $19 / hr (Avg Bid)
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    We are interested on online service for outsource (offshore) with you. This outsource is program coding such as PHP, C#. So, we would like to understand your pricing and work assignment model. could you please advise.

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    1. Identify a good value and properly sized CPLD/FPGA and toolset (toolset needs to be relatively easy to configure) to accommodate the required functionality. 2. Develop the CPLD/FPGA code. The device needs to take as inputs a set of states (from a microcontroller so either as an I2C command or as a 3 digital input code, along with 3 digital inputs

    $125 (Avg Bid)
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    I want to tie up with companies and Freelancer who are willing to outsource their projects and MyHinder Digital have that potential and skilled developers who can develop both Mobile and Web Development. We have completed many websites and Applications. [login to view URL], [login to view URL] [login to view URL]

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    I need a network of thermostats that send data over Power Line Communication to a router where it is then sent over Ethernet and stored on a server. I will need to have software to access and display the data in graph form. There are other components that I need that are not so detailed. I need consulting for the design and components to use for both the thermostats and the modem/router as well a...

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    I need some help with selling my services. I am verilog/ matlab coder and I need customers . you find me a client , I write his/her code and you get paid %30 of the project budget

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    ...square or rectangular with maximum dimensions of 9.5 cm x 9.5 cm. The PCB should hold 5 of the following boards: [login to view URL] There should be some minimal interconnection between the 5 boards (more details to be provided). The USB ports on each of the boards will be used only for programming

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    I am looking for Xilinx SDx OpenCL expert, who can convert github miner project into FPGA hex file in Xilinx SDx. Don't bid if you do not have experience.

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    I have a short project to do for an Altera 5M160Z CPLD (160 LE). This board has a 16-bit bus from a MCU and 8 control lines and output to a 10-pin port. What I need is a VHDL project (Quartus) that will implement a custom full duplex parallel to serial design. Development using simulation is fine.

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    Reading of sensor via PMOD on FPGA Xillinx. More details via messenger Freelancer.com with full requirements.

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    We need someone who can handle our client's projects as soon as possible. To begin with, we will assign 10 projects, if we like the work and quality, we may increase the number of projects.

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    I need to implement the project using fully parallel interleaver and QPP interleaver in FPGA platform. the language used for coding is Verilog and it is synthesized in Xilinx.

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    ...for 1 hour work max! We have the attached 128*128 image, i just need some fixes and to run it and produce the new image after the median filter we pass it through microblaze FPGA in the c program. I specifucally want: 1. instead of arrays i want the resulting image to come off like a txt if possible 2. i want inside the code to include the part we

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    Hello everybody, I want a simple median filter in c embedded through a micriblaze fFPGA. I have some part of the code ready. i need it in 1 hour. If you got it lets talk :)

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    add memory protection into the operating system, This project needs both hardware and software knowledge, you will be creating / implementing OS functions on the PicoBla...hardware and software knowledge, you will be creating / implementing OS functions on the PicoBlaze, programming in assembler. You may also need to modify the hardware using VHDL.

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    Hello dear, I have this image table i produced through c embedded median filter code. i want this table to be passed through an FPGA microblaze and then deliver the new image. Thats all. interested? it is for today

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    Hello dear, I have this image table i produced through c embedded median filter code. i want this table to be passed through an FPGA microblaze and then deliver the new image. Thats all. interested? it is for today

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    Hello Dear, I have an urgent quick project. I have a...quick project. I have an embedded median filter of a table image 128*128 in c. I have the c code ready already. I just need you to take the median image 8*8 a nd pass it through FPGA with and without cache memory and then deliver the new images we get. It is for today please reply if interested

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    Hello Freelancers, I would like to pass my table image through a FPGA microblaze (both with cache and without cache) and have a s deliverables the 2 new images we get as results. This is for TODAY. Thank you in advance :)

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    ...guys I will need these simple tasks for $10USD the deadline is today 8 September. Description In C language, i will need embedded a median filter that I need to pass after a FPGA microblaze with image data (128x128) (with and without cache memory). I would like comments on the code and the new resulting image as deliverables. I attach the image table

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    ...that I need to pass after a FPGA microblaze with image data (128x128) (with and without cache memory). I would comments on the code and the resulting image as deliverables. 2) I need just a divider in vhdl language to pass through and confirm with numbers that it works. Again comments on the code please. P.S.: 8 by 8 vhdl integer divider I attach the

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    I require ongoing assistance completing data input for client files into particular forms that need to be lodged with ASIC (industry regulator). The successful applicant will need to be able to read and interpret financial information such as Balance Sheets & Personal Property Security Register (PPSR) searches. I will provide the searches and financial

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    I will need some advice and recommendations for algorithms to create a cryptocurrency - blockchain. How to achieve fast transactions and privacy, hardware mining, asic -resistance

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    I am a consultant in a Network Marketing company looking for a Team Building Ambassador . This will consist of learning the business matrix and understanding it in order to explain it to others. The mission is to find leaders that understand network marketing and is ready to grow their own teams. There will be leads available, but the Team Building Ambassador should also find leads on their own.

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    ...- Electric Shock: An electric impulsion that hit a single ennemy - Hacker: A guy with black glasses and a gun - Bugs: 3 small landing creatures that launch strange things - ASIC: A big human like machine with fans - Mouses: 5 little computer mouses - Scammer: A bad look guy that hit with a computer The game will be played in a website that is currently

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    Guaranteed
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    7 entries

    RISC-V CPU chip high performance low power -- run EDA tools to generate GDSII synthesis and place and route

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    ...- $15 USD until 6 or 7 of September. 1) in C language, i will need embedded a median filter that I need to pass after a FPGA microblaze with image data (128x128) (with and without cache memory) 2) I need just a divider in vhdl language to pass through and confirm with numbers that it works I attach the image table in the files section. Thank you

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    I need help with the structural in Xilinx. I will give you full details. Regards

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    ...i am looking for Electrical & Electronics engineer Mechanical Engineer Civil Engineer Engineers should be expert in following fields Arduino Matlab Raspberry Pi FPGA Verilog/VHDL Python PCB Design (Eagle/Altium) Solidworks AutoCAD if you are expert in any of above mentioned fields then you can place a bid. We will prefer fresh Freelancers but

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    ...relates to vs1005 (All in one audio player on a chip) [login to view URL] by [login to view URL] in combination with the developer board. Programs are written using VLSI Solution's Integrated Development Environment VSIDE [login to view URL] We are coding a VS1005 and want to use a stepper motor as an encoder with

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    ...Paride, nice to meet you. i have got your conctact from Alessandro, a classmate. I am working on a easy Vhdl project, i already wrote all the code, the simolulation is working, but i need your help for two fast tasks: • I need to assign the pins on my FPGA, i can't find the correct pin of 2 serial signals. • i need you to check if the clock frequency is

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    verilog coding using putty or terminal. if you are interested i will give more information.

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    I want help with system Verilog coding. I have a working code that I want revised a bit.

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    An existing algorithm is available, apply it and get the results. Then make minor changes in it for improvement and get the results

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    Implement an AD2949 IC input block and some more

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    mtech Verilog project

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    looking for someone who can convert Open CL algorithm into FPGA Verilog project

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    Only experienced developer in FPGA mining and OpenCL GPU mining. I am looking for a freelancer who can convert Open CL algorithm into FPGA Verilog project.

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    ...site. x.25. Electronics Radio Circuits designing and Radio Frequency transmitters and receiver data communication experience required, preferably in Meteor burst technology. FPGA, Microcontroller interfacing, Motorola VHF transceiver experience preferred. The main Aim is Data communication through wireless communication link x.25. VHF Meteor burst transmitter

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    ...Development, Course Designing, Training, and placement guidance, based at South India. SD Pro providers Training and Projects in Embedded systems, VLSI, Matlab, Power systems, Power Electronics, DSP/DIP, VLSI, .Net, Java/J2EE /Android, Mechanical Design and Fabrication as well as develops its own range of quality Embedded products. SD Pro has successfully

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