Fpga spi interface verilog jobs

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    3,683 fpga spi interface verilog jobs found, pricing in USD
    FPGA programming. ABROAD. 5 days left
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    ...software for me. I would like this software to be developed . You will have to program an FPGA card that I will provide, to work for crypto mining. I will provide the software that works under windows and Linux and you will have to make this software works with the FPGA that will provide to you. Software will have to be perfectly optimized. You will

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    more details will be given in the chat

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    SoundLocator 5 days left

    Android development of app client to send (internet) sound and inertial sampling Hardware design of server (FPGA/SoC) to compute RT responses of precise positioning and navigation, taking into account multipath, doppler effect by movement, .. Also desiderable "roaming" to GPS coordinates to map position

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    ...are looking for freelancers with below skills Skills : Expert C and C++ programming skills. Experience in handling communication protocols like SNMP, UDP, TCP, Ethernet, SPI, etc Some familiarity with cryptographic functions and concepts. Experience in programming in C/C++, experience in Networking & Socket programming & multi-threading application

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    I am looking for someone to modify the OpenCL code base of an AMD focused Crypto Mining Software and optimize it for OpenCL Based FPGA using this package [url removed, login to view] Please respond directly with any questions such as specific mining software and such.

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    Help me to research and find a suitable FPGA board for my project.

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    traffic light controller with priority for emergency vehicles ( Police, Ambulance and firefighters ), I need a state diagram, a working verilog description of the design ( the simulation only) and discussing the results of the simulator (showing the waveform of the simulation)

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    I want to get a simple 3 layer (Input-Hidden-Output) layer neural network implemented on an FPGA. The network I wish to implement is a wide network with hidden neurons ~1000-2000. I want this to be implemented for highest data throughput with optimized resource utilization. Also want to software to be written for the implemented hardware.

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    Details later.. I will check your BASIC.. And then recruit You

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    ...C/C++, C# - Platform and operating system used: RTOS, Linux, Windows - Microcontroller: ARM core from STM, NXP or TI - Communication standards: I2C, CAN, RS485, UART, NFC, SPI - Experienced in develop embedded software for microcontroller - Understand the basic of electronic circuit - Experienced in developing application for android system like

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    Program a FPGA to work as a MC6803 on a device like a Digilent Cmod A7: Breadboardable Artix-7 FPGA Module. [url removed, login to view] . will need relevant information to program multiple devices.

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    Hello, I want to create the firmaware on ATMEG2560 a...motors, and stop reccording when it pressed again. Another button lunch the sequence reccorded like a loop. The reccording command could be store on a SD card communicate with SPI. The hardware is Arduino mega + 3 EasyDriver v4.5 + SD Cards if you think a need to had more thing, tell me.

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    Small project on computer architecture

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    I want to develop a serial interface on my FPGA board, serial communication from host done by Python.

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    I need help to clear the error in verilog code to make the fpga work. > Modules are already created with 2 feature of audio effects (delay and musical instrument) >Need help to clear the error, edit the code and make it work in fpga > Only 1 bitstream can be generated

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    I need the design of a microprocessor with 16 cores and 16 bit data bus with basic MIPS ISA, with 4 stage pipeline. I need the verilog code, testbench and physical design layout and testing (I will provide Synopsys tools)

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    ...Arduino fashion. Required features ---------------------------- * Follow Adafruit Unified Sensor Driver framework [url removed, login to view] * I2C and SPI communication to gyro and accelerometer * I2C communication to barometric pressure sensor * Check WHO AM I register * Change full scale range for gyro and accelerometer *

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    ...simple: I send 31 bytes from my computer to the FPGA (through UART), the FPGA makes some calculations and then I receive 54 bytes back to my PC (through UART again). The problem is that, I'm not receiving what is expected according to the simulation. Moreover, everytime I send the same bytes to the FPGA, I get back a different answer (which is not possible)

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    ...re-write the FPGA firmware to accommodate a faster ADC chip. We are currently using an 80 MSPS 14 bit ADC (AD9245BCPZ-80), which is the fastest in that specific form factor. Ideally, we would like to go as high as 180 MSPS whilst keeping the board the same size. This would require some re-work of the board and a re-writing of the FPGA code. We do

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